When: Thurs, May 17, 2018
Time: 10:00AM - 1:00PM (Includes lunch)
2708 Orchard Pkwy #20,
San Jose, CA 95134
Topics include: Serial data analysis, signal integrity, eye patterns, eye measurements, mask testing, eye mask unfolding, jitter measurements, crosstalk analysis, channel de-embedding, channel emulation, virtual probing, SSC, calculating bandwidth requirements, serial data waveform decoding, multi-lane testing, intersymbol interference, equalization, pre-emphasis and de-emphasis, DFE, FFE, CTLE equalization, transmitter and receiver measurements, SERDES testing
Who should attend: Who Should attend: EE’s working in Signal Integrity, SERDES, or Serial Data, Tech’s and Job seekers who want a better understanding of Serial Data Links.
Cost: FREE, registration is required to hold your seat.
Presenter: Karthik Radhakrishna
Applications Engineer, Teledyne LeCroy
Register for the Seminar
Debugging High Speed Serial Data Links
PLEASE NOTE: All visitors must provide valid government photo identification prior to gaining access to a Teledyne facility. This can be in the form of a driver's license or passport.