When: Tues., May 21, 2019
Time: 10:00AM - 1:00PM (Includes lunch)
Where: Teledyne LeCroy
765 Sycamore Drive.
Milpitas, CA 95035
The seminar covers the measurements of interest for designers of switch-mode power conversion circuits and devices. We will review the acquisition of voltage and current, their relationship in switch-mode power conversion circuits, and the analysis of power device switching losses, conduction losses, safe operating area, and dynamic on-resistance.
Register for the Seminar
Analyzing Switch Mode Power
PLEASE NOTE: All visitors must provide valid government photo identification prior to gaining access to a Teledyne facility. This can be in the form of a driver's license or passport.
- Switching Device Transitional Losses
- Device Saturation Voltage, Conduction Loss, and Dynamic-On Resistance
- Device Safe Operating Area (SOA)
- Improving probe and scope accuracies
- Differential Probe Criteria for Power Circuits including CMRR
- Upper and Lower Gate Drive Measurements
- Control Loop Response Analysis
- DV/DT Measurements
- Power Quality including Apparent Power, Real Power, and Power Factor
- Line Current Harmonics, Conducted Emissions
- Review of Methods for Making Differential Voltage Measurements in Power Design Applications
- Power Rail Integrity Analysis, Ripple, Noise, and Droop Analysis
Who Should Attend:
This seminar is especially targeted toward design engineers, evaluation engineers and engineering managers involved in switch-mode power circuit design, design verification and power device characterization. Power supply, motor drive, (adjustable speed drives) and high efficiency lighting circuit designers and evaluators.
Presenter: Steve Murphy
Applications Engineer at Teledyne LeCroy
Cost: FREE, registration is required to hold your seat.
The challenge is to perform accurate analysis while the power transistor or diode is operating in the non-ground referenced primary circuit of an off-line switch-mode power supply.
Instrumentation requirements such as overdrive recovery, high frequency common mode rejection, and channel to channel time delay matching will be covered.
Tools to determine a control loop’s step response to load changes using information contained in the pulse width modulation signal and soft start performance will be discussed. Testing line current harmonics against industry standard EN61000 3-2 and measurements of real power, apparent power, power factor, reactive power are included.
The seminar will be interactive. Specific applications questions for the audience are encouraged.