When: Weds, October 16, 2019
Time: 10:00AM - 1:00PM (Includes lunch)

Teledyne LeCroy
765 Sycamore Drive
Milpitas, CA 95035


This seminar will cover DDR4/5 and LPDDR4/5 debug tools including new high bandwidth differential probing solutions from Teledyne LeCroy.

Topics also include:
  • DDR5 Spec update
  • Probing of the DDR4/5 DUTs using new differential probes
  • Compliance testing and a checklist for pre-compliance testing
  • Read/Write Eye Separation
  • DDR4/5 Measurements
  • DDR4/5 Eye and Jitter Measurements
  • Multiple-scenario DDR eye patterns and jitter
  • Commands: How to access the DRAM?
These topics are important as DDR moves from servers into the Automotive, IoT and Industrial design world . Whether you're looking at DDR at the physical layer or need to know more about Compliance, Verification, Debug or documentation - this is the seminar for you.

Who should attend: Who Should attend: Memory design  EE’s, Tech’s and Job seekers who want a better understanding of DDR Pitfalls and measurement issues at the physical layer.

Cost:  FREE, registration is required to hold your seat.
Presenter: Mike Engbretson
High Speed Oscilloscope Product Manager, Teledyne LeCroy


Register for the Seminar

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DDR4/5 & LPDDR4/5 -
New Probing and Debug Solutions


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