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June 12 Webinar - Oscilloscope Basics
Focus On: Debugging Embedded Systems

DisplayPort Compliance Test Overview
Part 2: Protocol Compliance Testing for DP1.4



Now Available On Demand

As DisplayPort developers continue to deploy DP1.4 designs at HBR3-8.1Gb/s, and look forward to Ultra High Bit Rates (UHBR) up to 20Gb/s over the USB-C connector; testing becomes more complex with each generation of DisplayPort Sources, Sinks, and Cables. This two-part webinar will cover all aspects of testing DisplayPort designs from the only company that covers all the required compliance tests – for both Physical (PHY) Layer and all Protocol layers.

DisplayPort Compliance Test Overview: Part 2: Protocol Compliance Testing for DP1.4

Teledyne LeCroy’s DisplayPort physical-layer and protocol test experts will break down each test, explaining the background theory, how the test procedure works, how passes and failures are determined, and how to track down and debug problems.

In Part 1 we cover PHY Layer Testing

In Part 2, we cover a broad range of DisplayPort protocol compliance tests for both sources and sinks. These include Link Layer, Forward Error Correction (FEC), Display Stream Compression (DSC) and High-bandwidth Digital Content Protection (HDCP) compliance tests.


Presenters: Neal Kendall, Teledyne LeCroy Marketing Manager, quantumdata products (Part 2) and Mike Engbretson, Oscilloscope Product Marketing Manager (Part 1)


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