/* HOW TO USE: Change "display: inherit;" to "display: none;" to hide a section. Change the "order" property to change the order a section appears on the page. Sections with lowest order will appear first. EG 1, 2, 3, 5, 10 E.G. The hero section below will be visible and will be displayed third. #hero { display: inherit; order: 3; } The video section will be hidden so the order property for this section is ignored. #video { display: none; order: 5; } Hex code cheat sheet: Blue: #0076c0 Light Gray: #f3f3f3 Default Text Color: #222222 */ #fluid { background-color: #ffffff; display: none; order: 1; } #hero { background: url("https://placehold.it/3840x2458") no-repeat center center; display: none; order: 2; padding-bottom: 192px; padding-top: 192px; } /* Change hero overlay background-color to change the color on top of the hero image Opacity changes the transparency-level: 1 is not transparent at all, 0.5 is 50% see-through, and 0 is completely transparent */ #hero .overlay { background-color: #222222; opacity: 0.3; } #headline { background-color: #ffffff; display: none; order: 3; } #C6733 { background-color: #ffffff; display: inherit; order: 4; } #C2 { background-color: #ffffff; display: none; order: 5; } #C3 { background-color: #ffffff; display: none; order: 6; } #C4 { background-color: #ffffff; display: none; order: 7; } #C3367 { background-color: #ffffff; display: none; order: 8; } #form { background-color: #ffffff; display: none; order: 9; } #full-width-text { background-color: #ffffff; display: none; order: 10; } #video { background-color: #f3f3f3; display: none; order: 11; }

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Teledyne LeCroy Seminar

Live Webinar:
Debugging PCI Express® Power Management and Dynamic Link Behaviours

Date: Thurs., 09 Dec. 2021
Time: 15:00 CET

In high-speed serial data communication, especially in PCI Express and NVMe; it is becoming more and more important to analyze the physical and protocol layers at the same time without any timing delays between the two layers

In this webinar we will focus on a new test tool, CrossSync PHY, which has been developed precisely to meet these needs. Beginning with a short introduction to the physical and protocol layers of the PCIe bus, we will discuss the benefits of this tool, how it can help you to develop and debug PCI Express- and NVMe-related products, and how to be sure that both layers will work the way you have planned.

CrossSync PHY Webinar

Topics to be covered in this webinar:

PCI Express® overview
PCI Express® Power Management and L1 Substates Overview
Debugging across interface layers
Application examples
- Measuring L1 substate timing
- Measuring L1 substate power consumption
- Debugging live link training

Who should attend?: PCI Express validation, interoperability, applications and test engineers.

What attendees will learn: New techniques to validate and debug PCI Express link training, power management transitions, and other protocol-directed electrical behaviors.

Presenters:
Thomas Stüber, Group Leader Application EMEA; Peter Wiegard, Protocol Sales Specialist

Can't attend live? Register anyway and we will send you the recording and slides afterward.

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