How to Debug USB4 and USB 3.2 PHY-logic (PHY-Protocol) and Sideband Links

How to Debug USB4 and USB 3.2 PHY-logic (PHY-Protocol) and Sideband Links Webinar

AVAILABLE ON-DEMAND

This webinar was originally held on June 19, 2024.

How to Debug USB4 and USB 3.2 PHY-logic (PHY-Protocol) and Sideband Links

In this session we focus on compliance and interoperability (C&I) of USB Type-C connected hosts, hubs, adapters, and peripherals, with practical approaches to debugging electrical system issues that may occur when connecting USB-C devices together and meeting all USB-IF and Thunderbolt Specifications.

Topics to be covered in this webinar:

  • What happens when you attach the USB-C cable?
  • Probing at compliance test points (TP2, TP3)
  • Debugging Power Delivery (USB-PD) Issues
  • Debugging High Speed Serial link training issues

Who should attend? System Engineers, Firmware Engineers, and USB IC Field Support Engineers.

What attendees will learn: Attendees will learn practical methods for uncovering compliance and interoperability issues using an oscilloscope.

Presenter: 
Mike Engbretson, Teledyne LeCroy Product Marketing Manager
 

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