Methods to Improve Efficiency of
High-Speed Serial Data Tx/Rx PHY Validation

Webinar Invite - Methods to Improve Efficiency of High-Speed Serial Data Tx/Rx PHY Validation

Date: Wednesday, July 8, 2026
Time: 11 AM Pacific | 2 PM Eastern
Duration: 60 minutes

Methods to Improve Efficiency of High-Speed Serial Data Tx/Rx PHY Validation

Serial data electrical/PHY validation can be complex, time-consuming and costly. This webinar will present best practices and the latest automated test methods for high-speed serial SerDes Tx, Rx, and return loss compliance and validation..

In this webinar, you’ll learn how to:

  • Examples for USB4, Thunderbolt, DisplayPort 2.1, and PCI Express 6.0
  • Transmitter compliance automation and test optimization
  • Receiver Rx calibration and BER/TER testing for NRZ, PAM3 and PAM4 signaling (using Anritsu MP1900A)
  • Cost-effective and efficient Return Loss and and S-parameter measurements

Who should attend? Validation and Test Engineers responsible for validation, compliance, and debug of high speed serial standards.

What will attendees learn? Best practices, tips, and techniques for optimizing oscilloscope usage for serial data electrical/PHY validation and debug.

Presented by: Mike Engbretson, Product Marketing Manager

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