USB-C® Technologies PHY Testing Webinar Series
The USB Type-C connector is quickly becoming the PC industry’s standard for converged high-speed data, display (video), and power delivery. In this webinar series, Teledyne LeCroy technical experts cover USB-C technologies with a focus on the physical layer test, from an introduction to the various technologies in the USB-C ecosystem to USB4™, Thunderbolt™, DisplayPort™, USB 3.2 and Type-C sidebands (USB Power Delivery, DisplayPort AUX, USB4 SB) testing.
Part 1: Intro to USB-C Testing on the Physical Layer
Date: December 3, 2025
Time: 2PM Eastern / 11 AM Pacific
Duration: 60 Minutes
In this session we will provide an overview of all the electrical signals sent over the USB Type-C connector and how to test them. The USB Type-C connector is quickly becoming the PC industry’s standard for converged high-speed data, display (video) and power delivery
Topics to be covered in this webinar:
- The USB-C connector pinout and signaling
- USB standards and ‘alt modes’ supported by USB-C
- Intro to USB Power delivery (USB-PD) and sideband signal testing
- Intro to high speed testing
- Probes, fixtures, cables, etc.
Who should attend? Electrical validation and test engineers responsible for making sure their company’s or client’s designs are compliant with the USB-IF Compliance Test Specification (CTS).
What will attendees learn? The latest status of USB physical layer (PHY) compliance and PHY-logic debug tools tools conforming to the USB-IF test program.
Presented by: Mike Engbretson, Teledyne LeCroy Product Marketing Manager
Part 2: USB 3.2 Physical Layer Compliance Test Overview
AVAILABLE ON-DEMAND
In this session, we focus on the USB 3.2 specification given its ubiquitous use for USB peripherals. We will cover new test requirements for the USB 3.2 CTS and the tools for testing it.
Part 3: USB4™ Version 1.0 and Thunderbolt™ Physical Layer Compliance Test Overview
AVAILABLE ON-DEMAND
In this session, we provide an update on the latest tools available for USB4 electrical validation and compliance testing and requirements to adhere to the USB-IF’s test program.
Part 4: How to Debug USB4 and USB 3.2 PHY-logic (PHY-Protocol) and Sideband Links
AVAILABLE ON-DEMAND
In this session we focus on compliance and interoperability (C&I) of USB Type-C connected hosts, hubs, adapters, and peripherals, with practical approaches to debugging electrical system issues that may occur when connecting USB-C devices together and meeting all USB-IF and Thunderbolt Specifications.
Part 5: DisplayPort™ 2.1 PHY Layer Compliance and PHY-Logic Testing
Date: October 1, 2025
Time: 11AM | 2PM Eastern
Duration: 60 mins including live Q&A
In this webinar we will review the latest PHY test requirements DisplayPort 2.0. Source and Sink test updates and new VESA compliance program requirements.
Topics to be covered in this webinar:
- DisplayPort 2.1/1.4b Source Testing Updates
- DisplayPort 2.1/1.4b Sink Testing Updates
- DisplayPort 2.1/1.4b Return Loss Updates
- VESA Compliance Program Updates
- Clock Switch testing on LTTPR designs
Who should attend? Electrical validation and test engineers responsible for making sure their company’s or client’s DisplayPort designs are compliant the latest Compliance Test Specifications (CTS) and perform flawlessly in interoperability scenarios.
What will attendees learn? AElectrical validation and test engineers responsible for making sure their company’s or client’s DisplayPort designs are compliant the latest Compliance Test Specifications (CTS) and perform flawlessly in interoperability scenarios.
Presented by: Mike Engbretson, Teledyne LeCroy Product Marketing Manager
Part 6: USB4® Version 2.0 and Thunderbolt™ 5 Electrical Compliance Testing
AVAILABLE ON-DEMAND
In this session we provide an update of the latest tools available for USB4 electrical validation and compliance testing and requirements to adhere to the USB-IF’s test program.