Who should attend? Hardware design and validation engineers and technicians interested in learning more about PDN noise and power integrity problems and solutions.
What attendees will learn? Attendees will be given a thorough background in power integrity and how to assess it in a design.
Presenter: Dr. Patrick Connally, Product Marketing Manager
Part 2: Accurate and Efficient PDN Measurements Learning Lab
Part 3: Power Integrity in Multi-rail Embedded Designs Learning Lab
Part 4: SI/PI Measurements on a Budget
Part 5: 5 Tips for Power Integrity Debug
Part 6: Real-time Spectral Analysis of Power Rails
Part 7: Don’t Let Ground Bounce Ruin Your Day
Part 8: Practical On-die Power Integrity Measurements
You may also be Interested in:
The Impact of Power Rail Noise on Clock Jitter
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